In a conventional variable gain amplifier disclosed in FIG. 1 of Japanese Patent Laid-Open Publication No. 2001-308662, the characteristic of the base-emitter voltage of each of initial stage transistors Q1 and Q2 versus the collector current is expressed as an exponential function, hence providing an output voltage V0 with a non-linear distortion.
In order to reduce this distortion, a resistor is inserted in series to the emitter of each of initial stage transistors Q1 and Q2. This arrangement may reduce the non-linear distortion, but cannot completely eliminate the distortion.
A multiplier circuit provides a variable gain amplifier which does not generate the non-linear distortion in principle. FIG. 7 is a circuit diagram of multiplier circuit 5001. Integrated circuit (IC) 1 includes transconductance amplifier 2 and a pair of PN junction elements 4, and includes seven terminals, that is, power-supply terminal 1A (+Vcc), power-supply terminal 1B (−Vcc), input terminal 1C (INV), input terminal 1D (NI), input terminal 1E (BIAS), input terminal 1F (DB), and output terminal 1G (OUT).
Constant-current supply 101 (ID) is connected to input terminal 1F. Constant power supply 103 (½ID) outputting a ½ of the current from constant current supply 101 and signal input power supply (IX) are connected to input terminal 1C. Current Iout is output from output terminal 1G.
Amplifier 2 includes four current mirrors 5A to 5D and two initial stage transistors Q1 and Q2. Pair of PN junction elements 4 are configured by two diodes D1 and D2.
An operation of multiplier circuit 5001 will be described below.
The following quantity is defined by charge q of an electron, the Boltzmann constant K, and absolute temperature T:VT=K·T/q 
Voltage VBE between the base and emitter of a transistor is expressed by the following equation with emitter current IE, saturated current ISAT and collector current IC. Base current IB is much smaller than a collector current, hence providing IE≈IC.VBE=VT·ln(IE/ISAT)=VT·ln(IC/ISAT)
Forward direction voltage VD of a diode is expressed by the following equation with forward direction current ID of the diode.VD=VT·ln(ID/ISAT)
The Kirchhoff's law is applied between points A and B shown in FIG. 7, providing the following equations.VT·ln(ID1/ISAT)+VT·ln(I1/ISAT)=VT·ln(ID2/ISAT)+VT·ln(I2/ISAT)  (Equation 1)(ID1/ISAT)·(I1/ISAT)=(ID2/ISAT)·(I2/ISAT)ID1·I1=ID2·I2  (Equation 2)ID1=(½)·ID+IX  (Equation 3)ID2=(½)·ID−IX  (Equation 4)I1=(½)·Iy+Iout  (Equation 5)I2=(½)·Iy−Iout  (Equation 6)
From Equation 3, Equation 6 is assigned into Equation 2, providing the following equations.Ix·Iy=ID·IoutIout=Ix·Iy/ID  (Equation 7)
Based upon Equation 7, when current ID is constant, the product of input currents Ix and Iy is obtained from output terminal 1G as current Iout. When input current Iy is constant, the dividend obtained by dividing input current Ix by input current ID is obtained as output current Iout. Equation 7 includes no term of exponential function, and includes only terms of linear function, hence allowing multiplier circuit 5001 to generate no linear distortion in principle. Input current Ix and input current Iy are used as a signal input and a control input, respectively, thereby providing a variable gain amplifier generating no linear distortion in principle.
Multiplier circuit 5001 requires input terminal 1F for inputting a current to IC 1 from constant current supply 101, hence causing IC 1 to include seven terminals. An IC generally includes an even number of terminals, thus IC 1 necessarily includes a package having eight terminals.
Under recent demands for light weight and small electronic apparatuses, it is very important whether the IC package includes eight pins or six pins. In IC 1 accommodating multiplier circuit 5001, an area occupied by pads used for connecting terminals is greater than an area of a chip implementing circuit 5001. Thus, the area of the pads corresponding to the number of terminals influences the area of the chip, and is greatly reflected in the yield and costs.